Many individual process steps are required to produce a satisfactory semiconductor transistor. One such process is the annealing process wherein the temperature of the semiconductor die or wafer, as the case may be, is brought to a sufficient elevated temperature for the annealing process to be effective. However, there are many variations in semiconductor devices such as die layout and film stack variations, which tend to make each semiconductor device, die layout and film stack respond differently than previous and subsequent devices.
For example one wafer may contain a plurality of sections each of which may become a microprocessor in subsequent processing. While another wafer may contain areas that may become flash memory devices in subsequent processing stages. Therefore, as between the two wafers, there may be a multitude of variations in patterns, number of layers, and other differences. These differences may result in each wafer requiring more or less energy to achieve an adequate annealing temperature.
These variations are particularly troublesome with flash assisted annealing in the sub-melt regieme for silicon. In the flash anneal process, a high intensity lamp is utilized to inject thermal energy sufficient to achieve the annealing process quickly enough to heat only the surface of the wafer and not the bulk. The final peak surface temperature is a critical parameter of the system. Too much energy can melt the transistors. However, the changes in wafers as discussed previously may result in differences of reflectivity of the surfaces that can significantly affect the peak surface temperature achieved in the process. Also, variations in the amount of light originating from the flash lamp system also lead to unacceptable variations in the peak surface temperature.
Therefore, what is needed is a method and apparatus for controlling the flash anneal process and other improvements in semiconductor processing.